1. Field of the Invention
The present invention relates to non-impact printer apparatus and method for recording and to circuitry thereon for controlling data and other signals flowing to a printhead forming part of the printer apparatus.
2. Description of the Prior Art
The increasing functionality of integrated circuits (ICs) and circuit boards supporting such ICs has made testing of the boards by conventional techniques ever more difficult. For this reason, the Institute of Electronic and Electrical Engineers (IEEE) has adopted a standard (1149.1) for testing circuit boards by a technique known as boundary scan. The IEEE 1149.1 proposal is substantially identical to the boundary scan architecture adopted by the Joint Test Action Group (JTAG) of Europe and North America which is described in the document JTAG Boundary Scan Architecture Version 2.0, published in March 1988.
In accordance with the JTAG and IEEE boundary scan architecture individual boundary scan cells in a device (i.e. an integrated circuit ) are serially linked to establish a boundary scan register. Under the control of a test access port (TAP) controller in each device, each bit of an externally generated test vector TDI is shifted into a successive one of the cells. Thereafter, the bit in each "output" cell (i.e., a cell whose parallel output is fed to another cell) is applied to each "input" cell (i.e., a cell whose parallel input is coupled to an output cell). The bit at the parallel input of each "input" cell is captured (i.e., retained in place of the bit originally shifted into the cell). After the bits are captured, the bits are shifted out of all of the cells and are compared to the bits in a vector expected to be produced when no faults are present. Any deviation indicates a faulty connection between cells.
In U.S. Pat. Nos. 5,126,759 and 5,253,934 light-emitting diode (LED) printheads are described having plural input lines for inputting control signals and image data to each of plural driver ICs located on the printheads. In addition to power (V.sub.cc and V.sub.DD) and ground, other control signals lines include an exposure clock signal (EXPCLK), latch signals, a token bit signal, a token bit clock signal for shifting the token bit and a token bit directional signal for determining the direction for latching data in the driver chip. As noted in the aforementioned patents, the exposure clock signal provides non-linear clock pulses used by the driver for controlling on-time (pulsewidth modulated) of each LED in accordance with plural bits of image data associated with a pixel to be recorded. The token bit signal is used to designate a latch register which is associated with a particular LED for latching of a multibit data signal. As data is forwarded to a data bus in the driver, the token bit, token clock signal and token bit directional signal allow appropriate image data to be captured in a corresponding latch register. The respective data can then be printed for respective periods determined by the image data and the exposure clock pulses. In addition to the noted control signals, additional select signals are provided to the driver chips to decode various modes of operation. Among these modes are two modes that allow a multiplexed data signal to access two registers (LREF and GREF) common to every driver chip, which are used to bias the current output level of the drivers. In addition, there is a mode which allows a "bias monitor" output to be activated which controls monitoring of driver current in an extra channel. All of these additional functions are accessed serially in time over the same line. Since normal operation of passing image data over this same line is one of the defined modes of operation, this excludes access to these other functional modes during normal operation, i.e., when image data is passed over the line.
It would be desirable to be able to access certain registers for example, the LREF and GREF registers at any time without interrupting normal image data loading and printing operation and without the need of a dedicated secondary data path into the driver chip. It would also be desirable to access additional control functions on the driver chips without the need of dedicated secondary data paths while providing the standard IEEE 1149.1 testability functions, including boundary scan for the driver chip. It would also be desirable to provide control data for these control functions to the driver chip during recording of a line of current pixels without affecting such printing so that the control data then may be used to control recording of a line of subsequent pixels.